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LHF32KZR
47
Versions
V CC =5V±0.5V, 5V±0.25V, T A =0°C to +70°C
V CC =5V±0.25V (5)
V CC =5V±0.5V (6)
Sym.
Parameter
Notes
Min.
Max.
Min.
Max.
Unit
t AVAV
Write Cycle Time
70
80
ns
t PHEL
t WLEL
t ELEH
t SHEH
t VPEH
t AVEH
t DVEH
t EHDX
t EHAX
t EHWH
t EHEL
t EHRL
t EHGL
t QVVL
t QVSL
RP# High Recovery to BE# Going Low
WE# Setup to BE# Going Low
BE# Pulse Width
WP# V IH Setup to BE# Going High
V PP Setup to BE# Going High
Address Setup to BE# Going High
Data Setup to BE# Going High
Data Hold from BE# High
Address Hold from BE# High
WE# Hold from BE# High
BE# Pulse Width High
BE# High to STS Going Low
Write Recovery before Read
V PP Hold from Valid SRD, STS High Z
WP# V IH Hold from Valid SRD, STS
High Z
2
2
2
3
3
2,4
2,4
1
0
50
100
100
40
40
5
5
0
25
0
0
0
90
1
0
50
100
100
40
40
5
5
0
25
0
0
0
90
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. In systems where BE# defines the write pulse width (within a longer WE# timing waveform), all setup, hold and
inactive WE# times should be measured relative to the BE# waveform.
2. Sampled, not 100% tested.
3. Refer to Table 4 for valid A IN and D IN for block erase, bank erase, (multi) word/byte write or block lock-bit
configuration.
4. V PP should be held at V PPH1/2/3 until determination of block erase, bank erase, (multi) word/byte write or block
lock-bit configuration success (SR.1/3/4/5=0).
5. See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (High Seed
Configuration) for testing characteristics.
6. See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (Standard
Configuration) for testing characteristics.
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